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I’m now just one session of wire wrapping away from a completed ALU logic card.
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There’s now enough sockets, solder and wires to test all eight bits of the ALU logic card.
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Continuing on with the wire wrapping for the ALU logic card next up is the input and result links: Given the limited range of colours I’ve got to choose from (Black, Red, Green, Blue, Yellow) I’ve chosen the following scheme for the wire links: Black: Int…
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Finally, with all the soldering now done, it’s time to set about wire wrapping the ALU logic card.
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It seems that every time I move on to the next stage of construction on the ALU logic card it’s fiddlier than the stage before it … this stage is no exception.
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I’ve just realised that as I’ve been constructing the first ALU card I’ve not given much thought to how I’ll actually test the card (or other cards for that matter) when complete … this post therefore represents a quick aside to tackle testing.
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The construction of the ALU logic card is coming along nicely but there’s still a lot of soldering ahead to get all the relay sockets down … and this part is the fiddliest bit yet.
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Following on from the successful construction of the first bit on the ALU logic card in my last post it’s now time to start putting together the other 7 bits and the gating circuits (to place one of the logic results on to the data bus).
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So, although I probably should construct the logic card methodically a full stage at a time (solder header pins then sockets then wire wrap) I can’t resist fully assembling a single bit alone to see if/how it works.
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Following on from my last post I can now test the LEDs that have been soldered and hooked up to the header pins on each of the three ALU cards (Logic, Arithmetic and Control).
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Before I can test all of the LEDs laid down so far (to make sure they survived the heat of the soldering iron) I need to add some wire links on the logic card between the LED anodes and the header pins.
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So far, in the construction of the three ALU cards (Logic, Arithmetic and Control) I’ve soldered down the connectors and LEDs.
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Originally when I was thinking about how I’d connect up the various cards of this computer I had ribbon cables in mind.
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As promised in my last post it’s finally time to get the soldering iron out and make a start on constructing the three cards that make up the ALU.
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In the last three posts I introduced the design for the 3-to-8 Function Decoder, Zero Detect circuit and the Condition Registers.
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This post covers the design of the ALU Condition Registers which along with the 3-to-8 Function Decoder and Zero Detect circuit (both covered in my previous posts) make up the ALU Control Card.
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This post covers the design of the Zero Detect circuit which along with the 3-to-8 Function Decoder (covered in my last post) and the Condition Registers (next post) make up the ALU Control Card.
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This post covers the design of a 3-to-8 Function Decoder which along with the Zero Detect circuit and Condition Registers will all go in to the ALU Control Card.
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In the last post I introduced the design for the 1-bit Arithmetic Unit.
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This post covers the design of a 1-bit Arithmetic Unit that can add two input bits together (B and C) with carry in and out.
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In the last post I introduced the design for a 1-bit Logic Unit.
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This post covers the design of a 1-bit Logic Unit that can produce AND, OR, XOR, NOT and SHL (Shift Left) outputs from two input bits B and C.
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If there’s one thing a relay computer needs a lot of it’s … erm … relays (of course) … which happens to be a bit unfortunate as relays, compared to the other parts of the computer, are rather expensive.
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In the last post I promised to reveal the planned instruction set for the computer and here it is (pdf file).
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So, the last post didn’t quite wrap up this ‘mini-series’ but hopefully this one will.
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In this post I’ll wrap up this ‘mini-series’ of trying to explain away the various bits of the architecture that will make up my relay computer project — finally now we come on to Programming and Control of the computer.
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In this post I’ll continue to try and explain away the various bits of the architecture that will make up my relay computer project — this time it’s the Arithmetic Logic Unit (ALU).
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In this post I’ll continue to try and explain away the various bits of the architecture that will make up my relay computer project — this time it’s the memory.
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In this post I’ll continue to try and explain away the various bits of the architecture that will make up my relay computer project — this time it’s buses and registers.
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… and it all begins with binary.
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So, with the scene now set (see previous posts) let’s dive right in and take a look at the system architecture I’ll be building my computer upon … here it is … System Architecture for a Relay Computer[^1] This is a direct copy of the architecture Dr Harry…
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It strikes me that when embarking on a project like this there’s three things that are of uttermost importance, the three Rs if you will: Research, research and research.
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Whenever I tell people I’m building a relay computer the overwhelming response is … why on Earth would you want to do that?!
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… although being as I’m already a couple of months in on my little project then perhaps that should be ‘it began’.