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  1. Converting existing open-source FPGA projects to Bazel and rules_openxc7 makes hardware builds reproducible, eliminates machine-specific paths, and enables one-command bitstream generation without vendor licensing hurdles.

  2. Converting existing open-source FPGA projects to Bazel and rules_openxc7 transforms fragile, vendor-locked hardware build scripts into reproducible, sandboxed workflows.

  3. Open-source digital signal processing and machine learning accelerators are frequently published as student or research projects.

  4. rules_fusesoc integrates FuseSoC, the FPGA core package manager, into hermetic Bazel builds.

  5. This tutorial teaches you how to build your first FPGA bitstream with Bazel and the open-source rules_openxc7 toolchain.

  6. Doom on a RISC-V core written in TxHDL

    Doom now runs on Vreteno, the RISC-V core written in TxHDL, on an Artix-7 FPGA board.

  7. I built the same three designs with the open toolchain and with Vivado, through the same Bazel rules, and timed every build from cold and warm caches.

  8. Razboj: a minimal GPU in TxHDL

    Razboj is a minimal graphics rasteriser implemented in approximately one hundred lines of TxHDL.

  9. Linux boots to a shell on Vreteno

    Mainline Linux now boots to a shell on Vreteno, the RISC-V core written in TxHDL.

  10. Thanklessly Maintaining Open Source Software started as a fake O’Reilly book cover, and it is now an actual book on Amazon.

  11. rules_openxc7 brings open-source FPGA synthesis and place-and-route for AMD 7-series chips into Bazel.

  12. wdbcvt now publishes two new release archives with every build: a documentation bundle and a waveform corpus.

  13. Vreteno: a RISC-V core written in TxHDL

    Vreteno is the 32-bit RISC-V core we wrote in TxHDL, our hardware description language that is a Rust library.

  14. Volume II of the Fuchsia Internals series takes on the part of the system that is widely regarded as opaque on first contact: the build.

  15. The grlib Bazel module packages GRLIB, Gaisler’s (Frontgrade’s) GPL VHDL IP library, so that the NOEL-V RV64 RISC-V core and the AMBA infrastructure around it can be consumed as ordinary Bazel dependencies.

  16. tl;dr: A RISC-V core written in TxHDL draws a turning icosahedron on a monitor, with the TxHDL logo in the corner.

  17. For the past while, Dragiša Janković and I have been working on a hardware description language (HDL).

  18. A simulator answers questions about a design, but it answers them in a waveform viewer, which is a person looking at a screen.

  19. As far as I’m aware, this is the first open source converter which reads Vivado WDB waveform format and converts to the open-source FST waveform format.

  20. rules_vivado drives the AMD/Xilinx Vivado FPGA toolchain from Bazel: compile, simulate, synthesize, place-and-route, generate a bitstream, and program the device, all as ordinary build actions instead of clicks in a GUI or a pile of ad-hoc TCL.

  21. My homelab is fully ephemeral

    My homelab has no servers I care about.

  22. Volume I of my Fuchsia Internals report series is the graphics and display pipeline, and it is a deliberate choice for the first deep-dive: graphics is a complete worked application that exercises nearly every kernel primitive at once.

  23. This is a description of how I build programmable hardware.

  24. I have been writing a set of technical reports on the internals of Fuchsia, Google’s capability-based microkernel operating system, aimed squarely at electrical, RTL, and FPGA engineers rather than at kernel hackers.

  25. Interviews for FPGA and digital-design roles draw from a stable, well-defined body of knowledge, yet candidates routinely stumble on it because the questions are asked crisply and must be answered under pressure.

  26. Fuchsia’s Zircon kernel now boots on Cocoapuffs, my homebrew RISC-V system-on-chip on an AMD Artix-7 FPGA: as far as I know, the first Fuchsia boot on programmable hardware.

  27. Announcing bazel_local_nix 0.1.0

    I’m excited to announce the release of bazel_local_nix 0.1.0!

  28. Respin: upspin revival

    tl;dr: I revived the upspin project source code.

  29. Synod: Paxos agent

    Synod is a distributed Paxos coordination agent implemented in Go.

  30. mkill: a memory watchcat

    mkill is a Go program that continuously monitors memory usage of the programs owned by the current user.

  31. Inventory of programmable hardware tooling

    A link page of interesting libraries and utilities I found.

  32. fshlib: shell library

    fshlib fshlib is a simple shell library for logging.

  33. note to self: do not remove `.bazelversion`

    note to self: do not remove .bazelversion from projects The other day, I was pondering whether to keep setting particular bazel version in projects.

  34. This repository provides Bazel rules for creating self-extracting archives (“shar"s) out of shell binaries.

  35. Bazel rules to support a debian rootfs The idea of this repository is to provide a hermetic, ephemeral and reproducible repository of prebuilt binaries, which can then be brought into bazel builds to remove the dependence on local binary installations.

  36. This is another piece of news in my quest for hermetic, ephemeral, and reproducible builds (“HER”).

  37. Bazel knowledge sources

    This is a collection of links to interesting articles and knowledge sources about the Bazel build system that I found.

  38. This is another piece of news in my quest for hermetic, ephemeral, and reproducible builds (“HER”).

  39. Update 2025-10-19: I made a searchable index of modules available from my registry at https://www.hdlfactory.com/bazel-registry.

  40. lit2md: a literate program converter from code to Markdown lit2md is a simplistic literate programming (LP) converter.

  41. Writing XDC Clock Constraints for Vivado

    Writing XDC Clock Constraints for Vivado This guide explains how to properly constrain a digital design with multiple clocks in an XDC (Xilinx Design Constraints) file, specifically for use in Vivado batch mode.

  42. Decentralized Downloads for Bazel: Introducing bazel_rules_bt In the world of reproducible builds and efficient dependency management, Bazel stands out as a powerful tool.

  43. I asked Gemini to teach me about the VHDL resolved signals.

  44. How to shoot yourself in the foot with inout signals They say that no good deed goes unpunished.

  45. I asked Gemini to teach me the VHDL type conversions.

  46. I updated the repository https://github.com/filmil/vivado-docker/ with the changes required to package Vivado 2025.1.

  47. `rules_nixpkgs` use

    rules_nixpkgs use This is a run-down of tips and tricks for the use of rules_nixpkgs, a rule set for bringing in nix packages for use in bazel.

  48. Bid allows you to create a build rule that runs a single bazel build action inside a Docker container.

  49. Other formats: Original content is at: https://github.com/filmil/bazel-ebook The rendered HTML edition at: https://hdlfactory.com/bazel_ebook_html/ Introduction This repository is a set of bazel build rules that allow you to write a moderately complex book

  50. A quick note about correct use of glbl.v in a Verilog simulation in Vivado.