Wojciech Muła --- website

The current Intel CPUs translate instructions into so called uops (micro-ops), which is a kind of internal ISA.

Introduction This is the second part of SIMDized sum of all bytes in the array.

Introduction One step of k-means algorithm is calculating the distance between all centroids and all samples.

Introduction When work with SSE/AVX2/AVX512 it's virtually impossible not to use some vector constants, which are defined by _mm_set_epi32 or similar intrinsic functions.

Introduction I was curious how GCC vectorizes function that sums bytes from an array.

Introduction The problem is defined as follows: there's a stream of bytes and we want to get a byte-mask (or a bit-mask) that indicates which bytes are in the predefined set.

Introduction The goal is to find the first index of the minimum value in a non-empty sequence.

Introduction AVX-512 introduced the set of 64-bit mask registers, called in assembler k0 ... k7.

Introduction One of steps in JPEG compression is zigzag transformation which linearises pixels from 8x8 block into 64-byte array.

C++17 finally introduced filesystem library, which is pretty nice.

1 Introduction While conversion from a string into an integer value is feasible with SIMD instructions, this application is unpractical.

Another bug I bumped into.

Introduction Recently, I came across a function that checks whether an array is sorted, i.e. if there is no element which would be greater than its successor.

A few days ago I had compiled fresh GCC 8.0 from trunk and then compiled our product, just to see what we will have to fix in the future.

The current state I was really happy when saw that C++17 finally introduced standard functions to parse integers and floats.

Introduction The intersection of two sets represented by sorted collections (like lists or arrays) can be done in linear time.

To check if a number is a power of two, the instruction BLSR from BMI1 extension can be used.

With signed numbers it is really easy.

FPGA for a software developer It was one of my favourite talks.

Introduction Base64 algorithms were subject of my interest last year and I proposed a few different SIMD approaches for both encoding and encoding.

Problem There is an array of 64-bit values, we want to find the first bit set; the array is sparse.

Problem We have a string and want to check if all its characters are ASCII digits.

Introduction AMD XOP defines instruction VPTERNB which does lookup in a pair of SSE registers.

Introduction Popular programming languages provide methods or functions which locate a substring in a given string.

AVX512CD AVX512CD, or conflict detection, is a subset of AVX512 introducing following instructions: broadcast bit-mask to byte-mask (vpbroadcastmw2d and vpbroadcastmb2q); parallel lzcnt, i.e. counting leading zeros (vplzcntd and vplzcntq); conflict detect…

Introduction The instruction alignr in Intel SIMD builds a new vector from a subrange of two concatenated vectors; its downside is accepting only compile-time constants.

Problem We want to detect if a pattern is a sequence of zeros followed by ones.

Introduction Presented method allows to sort a whole AVX512 register or its subrange, it is a variant of counting sort.

See also The problem has been already reported (bug 66414).

Introduction Both base64 coding and decoding algorithms can be vectorized, i.e.

The problem There is an array of 32-bit integers and a key — a specific value.

Problem There is a SIMD register (128-, 256-, 512-bit width), we want to set all bits above the given position k; k is in range from 0 to the register's width.

Introduction The SIMD versions of base64 conversion algorithms were described in Base64 encoding with SIMD instructions and Base64 decoding with SIMD instructions.

Introduction In articles about base64 encoding and decoding I've showed how to implement SIMD version of a lookup table using basic vector instruction.

Introduction Surprisingly good results of base64 encoding with SIMD instructions forced me to check the opposite algorithm, i.e. the decoding.

Introduction I had supposed that SIMD-ization of a base64 encoder is not worth to bother with, and I was wrong.

Introduction The aim of this text is to show how simple procedure which change case of letters could be rewritten to SWAR version gaining significant boost.

Introduction The conversion of floating-point numbers to a string representation is not an easy task.

Introduction In a basic step of the Base64 encoding three bytes are processed producing four output bytes.

Case 1 On the other day I saw such innocent code: string decode_base64(string& base64) { // some validation string result; const size_t n = 3*base64.size() / 4; result.resize(n); // decoding stuff return result; } The size of…

I wrote: result += string_utils::pad_left(string, '0'); I forget that pad_left signature is string, int, char and the char parameter has a default value.

I'm fond of C++ weirdness, really.

Writing Fast Code Andrei performed a nice show, however some part were... hm, confusing.

The problem is defined as follows: a set of features is saved using bit-sets (usually large), and there is a list/map/whatever of sets containing features of different objects.

A programmer wrote: class container; class IndexOutOfBounds { public: IndexOutOfBounds(const std::string& msg); }; void container::remove(int index) { if (index < 0 || index >= size()) { throw new IndexOutOfBounds("Invalid index: " + in…

Introduction This well know method requires logarithmic number of steps in term of the word width.

Introduction The problem: there is an ordered dictionary containing only unique keys.

Introduction Intel's version of SIMD offers following 2-argument (binary) boolean functions: and, or, xor, and not.

Lesson learned Because we always have very large build logs I didn't notice the new warning.

Introduction The problem: there are 64-bit values with some data bits and some metadata bits; the metadata includes a k-bit field describing a "type" (k >= 0).