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Lukas Gerlach

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Articole: 28

  1. Spectre on RISC-V Silicon: Attacks and Defenses on Commercial Out-of-Order Processors

    (Lukas Gerlach)

  2. Spectre on RISC-V Silicon

    (Lukas Gerlach)

    Our paper Spectre on RISC-V Silicon: Attacks and Defenses on Commercial Out-of-Order Processors has been accepted at USENIX Security ‘26.

  3. How do Cache Attacks Against AES Work?

    (Lukas Gerlach)

    AES is the most widely used block cipher, and there are some cache side-channel attacks against it.

  4. TDXRay: Microarchitectural Side-Channel Analysis of Intel TDX for Real-World Workloads

    (Lukas Gerlach)

  5. Crucible: Retrofitting Commodity CPUs with Vulnerabilities via Transparent Software Emulation

    (Lukas Gerlach)

  6. Zero-Store Elimination and its Implications on the SIKE Cryptosystem

    (Lukas Gerlach)

  7. RISCover: Automatic Discovery of User-exploitable Architectural Security Vulnerabilities in Closed-Source RISC-V CPUs

    (Lukas Gerlach)

  8. SCASE: Automated Secret Recovery via Side-Channel-Assisted Symbolic Execution

    (Lukas Gerlach)

  9. Confusing Value with Enumeration: Studying the Use of CVEs in Academia

    (Lukas Gerlach)

  10. Taming the Linux Memory Allocator for Rapid Prototyping

    (Lukas Gerlach)

  11. Rapid Reversing of Non-Linear CPU Cache Slice Functions: Unlocking Physical Address Leakage

    (Lukas Gerlach)

  12. Lixom: Protecting Encryption Keys with Execute-Only Memory

    (Lukas Gerlach)

  13. Do Compilers Break Constant-time Guarantees?

    (Lukas Gerlach)

  14. Cascading Spy Sheets: Exploiting the Complexity of Modern CSS for Email and Browser Fingerprinting

    (Lukas Gerlach)

  15. ShadowLoad: Injecting State into Hardware Prefetchers

    (Lukas Gerlach)

  16. Peripheral Instinct: How External Devices Breach Browser Sandboxes

    (Lukas Gerlach)

  17. No Leakage Without State Change: Repurposing Configurable CPU Exceptions to Prevent Microarchitectural Attacks

    (Lukas Gerlach)

  18. Efficient and Generic Microarchitectural Hash-Function Recovery

    (Lukas Gerlach)

  19. CacheWarp: Software-based Fault Injection using Selective State Reset

    (Lukas Gerlach)

  20. A Security RISC? The State of Microarchitectural Attacks on RISC-V

    (Lukas Gerlach)

  21. Rowhammer Revisited: From Exploration to Exploitation and Mitigation

    (Lukas Gerlach)

  22. Reviving Meltdown 3a

    (Lukas Gerlach)

  23. Indirect Meltdown: Building Novel Side-Channel Attacks from Transient-Execution Attacks

    (Lukas Gerlach)

  24. A Rowhammer Reproduction Study Using the Blacksmith Fuzzer

    (Lukas Gerlach)

  25. Collide+Power: Leaking Inaccessible Data with Software-based Power Side Channels

    (Lukas Gerlach)

  26. Hammulator: Simulate Now-Exploit Later

    (Lukas Gerlach)

  27. A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs

    (Lukas Gerlach)

  28. CSAW Applied Research Competition Finalist

    (Lukas Gerlach)